Hardware starter: your first passing simulation
Generate a counter, testbench, and MCP configuration, then run a self-checking simulation.
The problem
Starting a hardware project needs consistent source files, a testbench entry point, runtime setup, and client configuration. Missing one makes even a small experiment difficult to reproduce.
What I built
I built an npx scaffolder that creates a counter design, self-checking testbench, Makefile, and configuration for nine hardware MCP servers. It connects the tools through a concrete first project.
Usable tool
Who it is for: New users who want a small RTL project and the hardware MCP configuration in one step.
First task: Run npx @zesun33/create-hw-agent my-asic, inspect the generated files, then follow its README.
What you can produce: Starter counter RTL, a testbench, a Makefile, and a client configuration for all nine MCP servers.
Current scope: Scaffolding is available from npm. Simulation and physical design still need a container runtime, images, and any relevant PDK.
Start with the example Source and documentation Step-by-step tutorials
A first useful result
Generate a project with npx -y @zesun33/create-hw-agent, then run make sim with Podman. The testbench checks the first increment and modulo-16 wrap. The tutorial deliberately introduces an increment bug so you can see the failure gate work.
Evidence and limits
The starter has automated scaffold tests, and the tutorial records actual simulation execution. A passing counter test establishes the exercised functional behavior. Next, add an event-enable input or connect an MCP client; board programming and physical design are separate steps.